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An etch back technique to achieve sub-micron T-gate for GaAsFETs using I-line stepper and phase shift mask (PSM)

dc.citation.epage1439en_US
dc.citation.spage1437en_US
dc.citation.volume4746en_US
dc.contributor.authorFu, DKen_US
dc.contributor.authorChen, SHen_US
dc.contributor.authorChang, HCen_US
dc.contributor.authorChang, EYen_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.date.accessioned2014-12-08T15:26:28Z
dc.date.available2014-12-08T15:26:28Z
dc.date.issued2002en_US
dc.description.abstractIn this study, an etch back process with I-line Stepper lithography and phase shift mask (PSM) is demonstrated for sub-micron T-gate fabrication. The opening after I-line lithography using PSM and first RIE etch of silicon nitride is 0.25mum. The opening after second silicon nitride deposition and RIE etch is decreased to 0.16mum. After metal deposition and lift-off, the developed T-shaped gate shows a footprint smaller than 0.2mum. The novel technique is a high throughput T-gate process compared to conventional E-beam technology and can be applied to mass production of high frequency GaAs-based FETs and MMIC.en_US
dc.identifier.isbn0-8194-4500-2en_US
dc.identifier.issn0277-786Xen_US
dc.identifier.journalPROCEEDINGS OF THE ELEVENTH INTERNATIONAL WORKSHOP ON THE PHYSICS OF SEMICONDUCTOR DEVICES, VOL 1 & 2en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/18798
dc.identifier.wosnumberWOS:000177351400293
dc.language.isoen_USen_US
dc.titleAn etch back technique to achieve sub-micron T-gate for GaAsFETs using I-line stepper and phase shift mask (PSM)en_US
dc.typeProceedings Paperen_US

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