微瓦級動態電壓與頻率調整之晶片匯流排設計
| dc.contributor.author | 蘇朝琴 | en_US |
| dc.contributor.author | SU CHAU-CHIN | en_US |
| dc.contributor.department | 國立交通大學電機與控制工程學系(所) | zh_TW |
| dc.date.accessioned | 2014-12-13T10:49:49Z | |
| dc.date.available | 2014-12-13T10:49:49Z | |
| dc.date.issued | 2009 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.identifier.govdoc | NSC98-2221-E009-137-MY2 | zh_TW |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=1906695&docId=316059 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/101841 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | 微瓦級動態電壓與頻率調整之晶片匯流排設計 | zh_TW |
| dc.title | The Design of .mu.W DVFS On-Chip Bus | en_US |
| dc.type | Plan | en_US |
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