高性能混合訊號式發收機積體電路---子計畫III：高速雙絞線網路發收機單晶片系統

dc.contributor.author	吳介琮	en_US
dc.contributor.author	WU JIEH-TSORNG	en_US
dc.contributor.department	交通大學電子工程系	zh_TW
dc.date.accessioned	2014-12-13T10:45:56Z
dc.date.available	2014-12-13T10:45:56Z
dc.date.issued	2000	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.identifier.govdoc	NSC89-2215-E009-066	zh_TW
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=542658&docId=99734	en_US
dc.identifier.uri	https://ir.lib.nycu.edu.tw/handle/11536/100527
dc.language.iso	zh_TW	en_US
dc.subject	收發器	zh_TW
dc.subject	單晶片系統	zh_TW
dc.subject	數位類比混合式積體電路	zh_TW
dc.subject	十億位元乙太網路	zh_TW
dc.subject	Transceiver	en_US
dc.subject	System-on-a-chip (SOC)	en_US
dc.subject	Mixed-signal integrated circuit	en_US
dc.subject	Gigabit ethernet	en_US
dc.title	高性能混合訊號式發收機積體電路---子計畫III：高速雙絞線網路發收機單晶片系統	zh_TW
dc.title	High-Speed Twisted-Pair Network Transceiver System on a Chip	en_US
dc.type	Plan	en_US

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