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A concurrent 0.18-mu m CMOS self-biased dual-band driver amplifier for IEEE 802.11 a/b/g

dc.citation.epage1267en_US
dc.citation.spage1264en_US
dc.contributor.authorJou, CFen_US
dc.contributor.authorCheng, KHen_US
dc.contributor.authorChen, JLen_US
dc.contributor.department傳播研究所zh_TW
dc.contributor.departmentInstitute of Communication Studiesen_US
dc.date.accessioned2014-12-08T15:25:55Z
dc.date.available2014-12-08T15:25:55Z
dc.date.issued2004en_US
dc.description.abstractA 2.4 GHz / 5.2 GHz self-biased dual band CMOS driver amplifier with a 9.8-dBm output power using TSMC 0.18-mu m IP6M standard CMOS process is described. The CMOS amplifier designed on Rogers R04003 printed-circuit-board (PCB) with a single input and a single output signal chain is simultaneously optimized for wireless local area network (WLAN) 2.4 GHz / 5.2 GHz applications. Simulation results show that the driver amplifier exhibits an Output power about 9.7-dBm in both 2.4 GHz and 5.2 GHz, output interception point (OIP3) of 24dBm with power added efficiency (PAE) = 27% and PAE =24% in 2.4GHz and 5.2 GHz, respectively. The die size is 0.85x0.7 mm(2).en_US
dc.identifier.isbn0-7803-8511-Xen_US
dc.identifier.journal2004: 7TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUITS TECHNOLOGY, VOLS 1- 3, PROCEEDINGSen_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/18362
dc.identifier.wosnumberWOS:000227342201112
dc.language.isoen_USen_US
dc.titleA concurrent 0.18-mu m CMOS self-biased dual-band driver amplifier for IEEE 802.11 a/b/gen_US
dc.typeProceedings Paperen_US

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