Design of 2xVDD-Tolerant I/O Buffer with 1xVDD CMOS Devices

dc.citation.epage	542	en_US
dc.citation.spage	539	en_US
dc.contributor.author	Ker, Ming-Dou	en_US
dc.contributor.author	Lin, Yan-Liang	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.date.accessioned	2014-12-08T15:24:40Z
dc.date.available	2014-12-08T15:24:40Z
dc.date.issued	2009	en_US
dc.description.abstract	A new 2xVDD-tolerant I/O buffer realized with only 1xVDD devices has been proposed and verified in a 0.18-mu m CMOS process. With the dynamic source output technique and the new gate-controlled circuit, the new proposed I/O buffer can transmit and receive the signals with the voltage swing twice as high as the normal power supply voltage (VDD) without suffering gate-oxide reliability problem. The proposed 2xVDD-tolerant I/O circuit solution can be implemented in different nanoscale CMOS processes to meet the mixed-voltage interface applications in microelectronic systems.	en_US
dc.identifier.isbn	978-1-4244-4072-6	en_US
dc.identifier.journal	PROCEEDINGS OF THE IEEE 2009 CUSTOM INTEGRATED CIRCUITS CONFERENCE	en_US
dc.identifier.uri	https://ir.lib.nycu.edu.tw/handle/11536/17129
dc.identifier.wosnumber	WOS:000275926300118
dc.language.iso	en_US	en_US
dc.title	Design of 2xVDD-Tolerant I/O Buffer with 1xVDD CMOS Devices	en_US
dc.type	Proceedings Paper	en_US

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