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Decoding Scheduling for Unequal Error Protection Quasi-Cyclic Low-Density Parity-Check Codes

dc.citation.epage0en_US
dc.citation.spage0en_US
dc.citation.woscount0en_US
dc.contributor.authorWu, Jia-Jyunen_US
dc.contributor.authorWang, Chung-Hsuanen_US
dc.contributor.authorChao, Chi-chaoen_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.date.accessioned2020-10-05T02:00:29Z
dc.date.available2020-10-05T02:00:29Z
dc.date.issued2019-01-01en_US
dc.description.abstractAlgebraic constructions of quasi-cyclic (QC) low-density parity-check (LDPC) codes with unequal error protection (UEP) capabilities have recently been proposed, which can provide different error-correcting capabilities for different parts of the coded bits. However, conventional decoding algorithms are not designed for LDPC codes with UEP. In this paper, we propose three decoding schemes for UEP QC-LDPC codes extended from existing scheduling strategies, tailored to the special structures of the parity-check matrices. Simulation results show that the proposed schemes can provide improved error rate performance especially for coded bits on low protection levels. The decoding convergence can also be accelerated, thereby reducing the computational complexity.en_US
dc.identifier.isbn978-1-7281-1669-3en_US
dc.identifier.issn2150-3680en_US
dc.identifier.journal2019 NINTH INTERNATIONAL WORKSHOP ON SIGNAL DESIGN AND ITS APPLICATIONS IN COMMUNICATIONS (IWSDA)en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/155017
dc.identifier.wosnumberWOS:000540642800005en_US
dc.language.isoen_USen_US
dc.titleDecoding Scheduling for Unequal Error Protection Quasi-Cyclic Low-Density Parity-Check Codesen_US
dc.typeProceedings Paperen_US

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