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On compliance test of on-chip bus for SOC

dc.citation.epage333en_US
dc.citation.spage328en_US
dc.contributor.authorLin, HMen_US
dc.contributor.authorYen, CCen_US
dc.contributor.authorShih, CHen_US
dc.contributor.authorJou, JYen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:25:40Z
dc.date.available2014-12-08T15:25:40Z
dc.date.issued2004en_US
dc.description.abstractIn this paper, we employ a monitor-based approach for on-chip bus (OCB) compliance test. To describe the OCB protocols, we propose a FSM model, which can help to extract the necessary properties systematically and verify the data part of a bus transfer efficiently. To demonstrate our methodology, we illustrate two OCB protocols, WISHBONE and AMBA AHB, as the study cases. The experimental results show that we can verify the OCB protocols efficiently and detect the design errors when tests fail.en_US
dc.identifier.isbn0-7803-8175-0en_US
dc.identifier.journalASP-DAC 2004: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCEen_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/18095
dc.identifier.wosnumberWOS:000221356700062
dc.language.isoen_USen_US
dc.titleOn compliance test of on-chip bus for SOCen_US
dc.typeProceedings Paperen_US

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