可延伸性多處理機系統架構設計之研究---子計畫二：多處理機作業系統設計之研發

dc.contributor.author	謝續平	en_US
dc.contributor.author	SHIEH SHIUH-PYNG	en_US
dc.contributor.department	交通大學資訊工程研究所	zh_TW
dc.date.accessioned	2014-12-13T10:38:36Z
dc.date.available	2014-12-13T10:38:36Z
dc.date.issued	1997	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.identifier.govdoc	NSC86-2213-E009-092	zh_TW
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=273236&docId=48823	en_US
dc.identifier.uri	https://ir.lib.nycu.edu.tw/handle/11536/95531
dc.language.iso	zh_TW	en_US
dc.subject	多處理機	zh_TW
dc.subject	線排程演算法	zh_TW
dc.subject	高位元虛擬記憶體	zh_TW
dc.subject	同步演算法	zh_TW
dc.subject	多處理機作業系統	zh_TW
dc.subject	Multiprocessor	en_US
dc.subject	Multithread scheduling	en_US
dc.subject	Wide-address virtual memory	en_US
dc.subject	Concurrent algorithm	en_US
dc.subject	Multiprocessor operating system	en_US
dc.title	可延伸性多處理機系統架構設計之研究---子計畫二：多處理機作業系統設計之研發	zh_TW
dc.title	A Study on the Design of Multiprocessor Operating Systems	en_US
dc.type	Plan	en_US

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