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低功率低電壓數位及類比積體電路之晶片實現及設計法則(IV)
低功率低電壓數位及類比積體電路之晶片實現及設計法則(IV)
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882215E009061.pdf
(249.99 KB)
Date
1999
Authors
陳明哲
CHEN MING-JER
Journal Title
Journal ISSN
Volume Title
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DOI
Abstract
Description
Keywords
類比積體電路
,
低功率
,
雙極接面電晶體
,
次臨限金氧半導體
,
雜訊量測
,
數位積體電路
,
Analog integrated circuit
,
Low power
,
Bipolar junction transistor (BJT)
,
Subthreshold MOS
,
Noise measurement
,
Digital integrated circuit
Citation
URI
https://www.grb.gov.tw/search/planDetail?id=418227&docId=74195
https://ir.lib.nycu.edu.tw/handle/11536/94268
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