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Complementary substrate-triggered SCR devices for on-chip ESD protection circuits

dc.citation.epage233en_US
dc.citation.spage229en_US
dc.contributor.authorKer, MDen_US
dc.contributor.authorHsu, KCen_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.date.accessioned2014-12-08T15:26:29Z
dc.date.available2014-12-08T15:26:29Z
dc.date.issued2002en_US
dc.description.abstractThe turn-on mechanism of SCR device is essentially a current triggering event. While a current is applied to the base or substrate of a SCR device, it can be quickly triggered on into its latching state. In this paper, the complementary substrate-triggered SCR devices which are combined with the substrate-triggered technique and SCR devices, are first reported in the literature for using in the on-chip ESD. protection circuits. A complementary style on the substrate-triggered SCR devices is designed to discharge both of the positive and negative ESD stresses on the pad. The total holding voltage of the substrate-triggered SCR device can be increased by adding the stacked diode string to avoid the transient-induced latchup issue in the ESD protection circuits. The on-chip ESD protection circuits designed with the proposed complementary substrate-triggered SCR devices for the I/O pad and power pad have been successfully verified in a 0.25-mum STI CMOS process with the HBM (MM) ESD level of >8kV (650V) in a small layout area.en_US
dc.identifier.isbn0-7803-7494-0en_US
dc.identifier.issn1063-0988en_US
dc.identifier.journal15TH ANNUAL IEEE INTERNATIONAL ASIC/SOC CONFERENCE, PROCEEDINGSen_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/18807
dc.identifier.wosnumberWOS:000179659500040
dc.language.isoen_USen_US
dc.titleComplementary substrate-triggered SCR devices for on-chip ESD protection circuitsen_US
dc.typeProceedings Paperen_US

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