A Fourth-Order FeedForward Continuous-Time Delta-Sigma ADC with 3MHz Bandwidth

Abstract

A fourth-order feedforward continuous-time (CT) delta-sigma modulator is presented. The modulator takes an active-RC OpAmp as the first stage because of the high-linearity requirement, and the other three stages are composed by Gm-C integrators. In feedforward topology, a higher out-of-band NTF gain could be taken for better performance. As we know, the most important part in the feedforward CT Delta Sigma modulator is the summation circuit for the feedforward paths. The modulator uses a tuning adder, which we propose, to make sure the modulator can work correctly even under the influence of the process variation on resistors. Finally, the delta-sigma modulator is implemented in standard digital 0.18-mu m CMOS process, which achieves 57.84 dB SNDR over a 3MHz signal bandwidth at an OSR of 16.67. The power consumption of the CT delta-sigma modulator is 11.8 mW from the 1.8-V supply.