1-V linear CMOS transconductor with-65 dB THD in nano-scale CMOS technology

Abstract

This paper presents a high linearity MOSFET-only transconductor based on differential structures. The linearity is improved by mobility compensation techniques as the device size is scaled down in the nano-scale CMOS technology. Transconductance tuning could be achieved by transistors operating in the linear region. The simulated total harmonic distortion (THD) under 1-V power supply voltage shows 12 dB improvement of the proposed version, and -65 dB TTID can be achieved for a 1 MHz 700 mV(pp) differential input. Monte-Carlo simulation over the corner variation and transistor mismatch guarantees the shown performance. The static power consumption is 130 mu W. Simulation results demonstrate the agreement with theoretical analyses.