結合非揮發性之多核心系統與記憶體架構
| dc.contributor.author | 陳添福 | zh_TW |
| dc.contributor.author | Chen Tien-Fu | en_US |
| dc.contributor.department | 國立交通大學資訊工程學系（所） | zh_TW |
| dc.date.accessioned | 2016-03-28T08:17:44Z | |
| dc.date.available | 2016-03-28T08:17:44Z | |
| dc.date.issued | 2015 | en_US |
| dc.description.sponsorship | 科技部 | zh_TW |
| dc.identifier.govdoc | MOST103-2221-E009-204-MY3 | zh_TW |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=11269943&docId=454881 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/130399 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | 結合非揮發性之多核心系統與記憶體架構 | zh_TW |
| dc.title | Memory and Multicore System Architecture of Processing in Memory with Non-Volatility | en_US |
| dc.type | Plan | en_US |
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