超大型積體電路電腦網路輔助設計系統---子計畫七：神經網路關聯記
| dc.contributor.author | 闕志達 | en_US |
| dc.contributor.author | CHIUEH TZI-DAR | en_US |
| dc.contributor.department | 國立台灣大學電機工程學研究所 | zh_TW |
| dc.date.accessioned | 2014-12-13T10:40:12Z | |
| dc.date.available | 2014-12-13T10:40:12Z | |
| dc.date.issued | 1994 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.identifier.govdoc | NSC83-0404-E002-060 | zh_TW |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=109864&docId=17490 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/97277 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | 超大型積體電路電腦網路輔助設計系統---子計畫七：神經網路關聯記 | zh_TW |
| dc.title | Development of Neural Associative Memory Chips | en_US |
| dc.type | Plan | en_US |
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