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Novel ultra-low voltage and high-speed programming/erasing schemes for SONOS flash memory with excellent data retention

dc.citation.epage460en_US
dc.citation.spage457en_US
dc.contributor.authorChung, Steve S.en_US
dc.contributor.authorTseng, Y. H.en_US
dc.contributor.authorLai, C. S.en_US
dc.contributor.authorHsu, Y. Y.en_US
dc.contributor.authorHo, Ericen_US
dc.contributor.authorChen, Terryen_US
dc.contributor.authorPeng, L. C.en_US
dc.contributor.authorChu, C. H.en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:09:24Z
dc.date.available2014-12-08T15:09:24Z
dc.date.issued2007en_US
dc.description.abstractA novel cell operation scheme featuring low voltage, high speed, and excellent data retention has been proposed for SONOS flash memory First, in 1bit/cell operation, program is achieved by a back-bias assisted hot hole injection, while erase is achieved by forward-bias assisted electron injection. For a thick tunnel oxide (50A degrees), the ultra-low voltage (similar to 5V) and ultra-fast speed (<1 mu sec) operation has been the record reported to date. On the other hand, a 2 bit/cell operation is also demonstrated, in which very good retention can be achieved in comparison to conventional operation schemes, e.g., CHE (channel hot electron) or BTB(Band-to-band) tunneling etc.en_US
dc.identifier.doi10.1109/IEDM.2007.4418972en_US
dc.identifier.isbn978-1-4244-1507-6en_US
dc.identifier.journal2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2en_US
dc.identifier.urihttp://dx.doi.org/10.1109/IEDM.2007.4418972en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/7179
dc.identifier.wosnumberWOS:000259347800103
dc.language.isoen_USen_US
dc.titleNovel ultra-low voltage and high-speed programming/erasing schemes for SONOS flash memory with excellent data retentionen_US
dc.typeArticleen_US

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