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Investigation on seal-ring rules for IC product reliability in 0.25-mu m CMOS technology

dc.citation.epage1316en_US
dc.citation.issue9-11en_US
dc.citation.spage1311en_US
dc.citation.volume45en_US
dc.contributor.authorChen, SHen_US
dc.contributor.authorKer, MDen_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.date.accessioned2014-12-08T15:18:35Z
dc.date.available2014-12-08T15:18:35Z
dc.date.issued2005-09-01en_US
dc.description.abstractThe distance between active region and the seal-ring location has been investigated in a 0.25 mu m CMOS process. From the experimental results, this distance can be shrunk to only 5 pm without increasing leakage current and decreasing ESD robustness of the ESD protection devices after reliability tests of High-Accelerated Stress Test (HAST) and Temperature Cycling Test (TCT). (c) 2005 Elsevier Ltd. All rights reserved.en_US
dc.identifier.doi10.1016/j.microrel.2005.07.012en_US
dc.identifier.issn0026-2714en_US
dc.identifier.journalMICROELECTRONICS RELIABILITYen_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.microrel.2005.07.012en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/13376
dc.identifier.wosnumberWOS:000232253500007
dc.language.isoen_USen_US
dc.titleInvestigation on seal-ring rules for IC product reliability in 0.25-mu m CMOS technologyen_US
dc.typeArticle; Proceedings Paperen_US

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