A cost-effective memory-based real-valued FFT and hermitian symmetric IFFT processor for DMT-based wire-line transmission systems

dc.citation.epage	6009	en_US
dc.citation.spage	6006	en_US
dc.contributor.author	Chi, HF	en_US
dc.contributor.author	Lai, ZH	en_US
dc.contributor.department	電信工程研究所	zh_TW
dc.contributor.department	Institute of Communications Engineering	en_US
dc.date.accessioned	2014-12-08T15:25:24Z
dc.date.available	2014-12-08T15:25:24Z
dc.date.issued	2005	en_US
dc.description.abstract	This paper presents an efficient computation scheme for the memory-based FFT/IFFT processor used in DMT (discrete multi-tone) systems. Only half-size FFT/IFFT is required to transform real-valued data and Hermitain symmetric data. That is, the cost in processing elements and memory can be reduced by two. Finally, a variable-size radix-4 memory-based FFT/IFFT processor with block scaling scheme is designed for DMT systems.	en_US
dc.identifier.isbn	0-7803-8834-8	en_US
dc.identifier.issn	0271-4302	en_US
dc.identifier.journal	2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS	en_US
dc.identifier.uri	https://ir.lib.nycu.edu.tw/handle/11536/17800
dc.identifier.wosnumber	WOS:000232002405164
dc.language.iso	en_US	en_US
dc.title	A cost-effective memory-based real-valued FFT and hermitian symmetric IFFT processor for DMT-based wire-line transmission systems	en_US
dc.type	Proceedings Paper	en_US

Files

Now showing 1 - 1 of 1