III-V METAL-OXIDE-SEMICONDUCTOR DEVICE
| dc.citation.patentcountry | USA | zh_TW |
| dc.citation.patentnumber | 20120032279 | zh_TW |
| dc.contributor.author | CHANG Edward Yi | en_US |
| dc.contributor.author | LIN Yueh-Chin | en_US |
| dc.date.accessioned | 2014-12-16T06:15:17Z | |
| dc.date.available | 2014-12-16T06:15:17Z | |
| dc.date.issued | 2012-02-09 | en_US |
| dc.description.abstract | A barrier layer, hafnium oxide layer, between a III-V semiconductor layer and an lanthanum oxide layer is used to prevent interaction between the III-V semiconductor layer and the lanthanum oxide layer. Meanwhile, the high dielectric constant of the lanthanum oxide can be used to increase the capacitance of the semiconductor device. | zh_TW |
| dc.identifier.govdoc | H01L029/20 | zh_TW |
| dc.identifier.govdoc | H01L029/94 | zh_TW |
| dc.identifier.govdoc | H01L029/78 | zh_TW |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/105217 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | III-V METAL-OXIDE-SEMICONDUCTOR DEVICE | zh_TW |
| dc.type | Patents | en_US |