可變速率視訊編解碼器架構模擬
| dc.contributor.author | 杭學鳴 | en_US |
| dc.contributor.author | HANG HSUEH-MING | en_US |
| dc.contributor.department | 交通大學電子工程研究所 | zh_TW |
| dc.date.accessioned | 2014-12-13T10:40:34Z | |
| dc.date.available | 2014-12-13T10:40:34Z | |
| dc.date.issued | 1993 | en_US |
| dc.description.sponsorship | 交通部 | zh_TW |
| dc.identifier.govdoc | TL-82-7202 | zh_TW |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=26671&docId=3280 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/97645 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | 可變速率視訊編解碼器架構模擬 | zh_TW |
| dc.title | Variable-Bit-Rate Video Codec Design and Simulation | en_US |
| dc.type | Plan | en_US |
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