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A display order oriented scalable video decoder

dc.citation.epage1979en_US
dc.citation.spage1976en_US
dc.contributor.authorHuang, Jia-Binen_US
dc.contributor.authorLin, Yu-Kunen_US
dc.contributor.authorChang, Tian-Sheuanen_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.date.accessioned2014-12-08T15:25:05Z
dc.date.available2014-12-08T15:25:05Z
dc.date.issued2006en_US
dc.description.abstractAs network technologies advance, Scalable Video Coding (SVC) has become increasingly popular due to its universal multimedia access capability and competitive compression performance with the state-of-the-art single-layer video coding. However, it's decoding delay, memory bandwidth and storage requirement are much larger than those of single-layer video coding due to various scalabilities. In this paper, we propose a novel display order instead of direct bitstream order oriented decoding method for the SVC decoder to solve above implementation problems. The analysis for hardware-oriented algorithm shows that the proposed decoding order can reduce the decoding delay, memory bandwidth and storage requirement significantly while is still applicable to various scalable requirements.en_US
dc.identifier.isbn978-1-4244-0386-8en_US
dc.identifier.journal2006 IEEE Asia Pacific Conference on Circuits and Systemsen_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/17466
dc.identifier.wosnumberWOS:000246793200493
dc.language.isoen_USen_US
dc.subjectH.264/AVCen_US
dc.subjectmotion compensated temporal filteringen_US
dc.subjectscalable video codingen_US
dc.titleA display order oriented scalable video decoderen_US
dc.typeProceedings Paperen_US

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