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PD-SOI MOSFET Body-to-Body Leakage Scaling Trend and Optimization

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dc.citation.epage+en_US
dc.citation.spage49en_US
dc.citation.woscount0en_US
dc.contributor.authorLo, H. C.en_US
dc.contributor.authorLuo, W. C.en_US
dc.contributor.authorLu, W. Y.en_US
dc.contributor.authorCheng, C. F.en_US
dc.contributor.authorWu, Bennyen_US
dc.contributor.authorChen, T. L.en_US
dc.contributor.authorLien, C. H.en_US
dc.contributor.authorFung, Samuel K. H.en_US
dc.contributor.authorTuan, H. C.en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2017-04-21T06:49:36Z
dc.date.available2017-04-21T06:49:36Z
dc.date.issued2008en_US
dc.description.abstractBody-to-Body leakage (BBL) in stacked transistor configuration has been characterized by different back gate biases (Vbg), SOI thicknesses, and poly spacings. BBL increases significantly from 65nm to 45nm node mainly due to smaller poly spacing and shallower S/D junctions. By implant optimization and reduction of the SOI thickness, BBL can be reduced below reverse junction leakage level.en_US
dc.identifier.doi10.1109/SOI.2008.4656288en_US
dc.identifier.isbn978-1-4244-1954-8en_US
dc.identifier.issn1078-621Xen_US
dc.identifier.journal2008 IEEE INTERNATIONAL SOI CONFERENCE, PROCEEDINGSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/SOI.2008.4656288en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/135058
dc.identifier.wosnumberWOS:000262065700018en_US
dc.language.isoen_USen_US
dc.titlePD-SOI MOSFET Body-to-Body Leakage Scaling Trend and Optimizationen_US
dc.typeProceedings Paperen_US

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