低維韻律陣列設計上封閉解之研究
| dc.contributor.author | 蔡中川 | en_US |
| dc.contributor.department | 國立交通大學資訊工程學系 | zh_TW |
| dc.date.accessioned | 2014-12-13T10:33:54Z | |
| dc.date.available | 2014-12-13T10:33:54Z | |
| dc.date.issued | 2003 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.identifier.govdoc | NSC92-2213-E009-090 | zh_TW |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=843470&docId=159785 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/92364 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | 低維韻律陣列設計上封閉解之研究 | zh_TW |
| dc.title | On the Closed-Form Mapping Conditions in Designing Lower-Dimensional Systolic Arrays | en_US |
| dc.type | Plan | en_US |