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A Resistance-Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100x for Storage-Class Memory Applications

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dc.citation.epageU179en_US
dc.citation.spage134en_US
dc.citation.volume59en_US
dc.citation.woscount0en_US
dc.contributor.authorKhwa, Win-Sanen_US
dc.contributor.authorChang, Meng-Fanen_US
dc.contributor.authorWu, Jau-Yien_US
dc.contributor.authorLee, Ming-Hsiuen_US
dc.contributor.authorSu, Tzu-Hsiangen_US
dc.contributor.authorYang, Keng-Haoen_US
dc.contributor.authorChen, Tien-Fuen_US
dc.contributor.authorWang, Tien-Yenen_US
dc.contributor.authorLi, Hsiang-Pangen_US
dc.contributor.authorBrightSky, Matthewen_US
dc.contributor.authorKim, SangBumen_US
dc.contributor.authorLung, Hsiang-Lamen_US
dc.contributor.authorLam, Chungen_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.date.accessioned2017-04-21T06:49:55Z
dc.date.available2017-04-21T06:49:55Z
dc.date.issued2016en_US
dc.identifier.isbn978-1-4673-9467-3en_US
dc.identifier.issn0193-6530en_US
dc.identifier.journal2016 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC)en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/136197
dc.identifier.wosnumberWOS:000382151400049en_US
dc.language.isoen_USen_US
dc.titleA Resistance-Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100x for Storage-Class Memory Applicationsen_US
dc.typeProceedings Paperen_US

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