ULSI multi-layer thin film passivation processes for improving cache memory performance

Abstract

A multi-layer thin film structure based on PECVD SiO2/SiNx layers are deposited and characterized, in order to improve and optimize the electrical performance and hot carrier reliability of poly load resistors in 4-transistor (4-T) cache Static Random Access Memory (SRAM) devices. SiH4/N2O gas mixtures are utilized as precursors for oxide CVD process. Higher SiH4/N2O flow rate ratios render the resulting oxide films more silicon-rich, as manifested by their higher refractive index (R.I.) and BOE etch rates. These modifications in film characteristics also correspond to enhanced resistance of poly load resistor and lower % hot-carrier linear drain current (I-dlin) degradation. An increase in R.I. from 1.46 to 1.60 translates to a rise in resistance of poly load resistor from 98 Ga to 225 G Omega and a fall in I-dlin from 5.8 % to 4.5 %. Further improvement in device performance can be fulfilled by modifying the stoichiometry of the overlying nitride passivation layer. This is achieved by increasing bias power while reducing SiH4/NH3 gas flow rate ratio during the PECVD nitride deposition process. The nitride films thus deposited contain lower SI-H bond density, and exhibit lower BOE etch rates and compressive stress. Passivation structures based on the combination of a high RI SRO with a tow Si-H content nitride layers yield the most promising device performance and reliability. Water and hydrogen diffusion to the poly gate and load resistor are both held responsible for device degradation.