A CMOS distributed amplifier with current reuse optimization

Abstract

A CMOS distributed amplifier with current reuse optimization is presented. Using current reuse technique, the distributed amplifier achieves low power consumption while retaining the same gain-bandwidth product in comparison with standard common-source topology. The DA demonstrates low current consumption of only,12.9 mA with 4 dB gain from 3 to 8 GHz using a 0.18-mu m CMOS technology. An analog behavior model is also developed for system-level simulation to shorten the design time and increase design quality for future integrated wide.-band transceivers.