Self-substrate-triggered technique to enhance turn-on uniformity of multi-finger ESD protection devices

Abstract

A novel self-substrate-triggered technique for on-chip ESD protection design is proposed to solve the non-uniform turn-on phenomenon of multi-finger gate-grounded nMOS (GGnMOS). The center-finger nMOS transistors in the multi-finger GGnMOS structure are always turned on first under ESD stress, so its source terminal is connected to the base (substrate) terminals of the other parasitic lateral n-p-n bipolar transistors (BJTs in the GGnMOS structure) to form the self-substrate-triggered design. With the proposed self-substrate-triggered technique, the first turned-on center-finger nMOS transistors are used to trigger on the others. Therefore, all fingers of GGnMOS can be triggered on simultaneously to discharge ESD current. From the experimental results verified in a 0.13-mu m CMOS process with the thin gate oxide of 25 A, the turn-on uniformity and ESD robustness of the GGnMOS can be greatly improved without increasing extra layout area through the proposed self-substrate-triggered technique.