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A NOVEL MEMORY ARCHITECTURE FOR VIDEO SIGNAL PROCESSOR

dc.citation.epage278en_US
dc.citation.spage270en_US
dc.citation.volume1976en_US
dc.contributor.authorHUNG, JSen_US
dc.contributor.authorLIN, CHen_US
dc.contributor.authorJEN, CWen_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.date.accessioned2014-12-08T15:27:57Z
dc.date.available2014-12-08T15:27:57Z
dc.date.issued1993en_US
dc.identifier.doi10.1117/12.161478en_US
dc.identifier.isbn0-8194-1222-8en_US
dc.identifier.journalHIGH-DEFINITION VIDEOen_US
dc.identifier.urihttp://dx.doi.org/10.1117/12.161478en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/20221
dc.identifier.wosnumberWOS:A1993BZ40N00027
dc.language.isoen_USen_US
dc.titleA NOVEL MEMORY ARCHITECTURE FOR VIDEO SIGNAL PROCESSORen_US
dc.typeProceedings Paperen_US

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