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Method for buffering clock skew by using a logical effort

dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber08487684zh_TW
dc.contributor.authorHsieh Chung-Yingen_US
dc.contributor.authorChang Ming-Hungen_US
dc.contributor.authorHwang Weien_US
dc.date.accessioned2014-12-16T06:14:00Z
dc.date.available2014-12-16T06:14:00Z
dc.date.issued2013-07-16en_US
dc.description.abstractA method buffers clock skew by using a logical effort, and is applicable to a clock tree that stays in a strong-inversion region, a moderate-inversion region, or a weak-inversion region. The method includes establishing in the clock tree a temperature sensor and a tunable-width buffer, and establishing width and temperature comparative lists according to a logical effort equation, for the tunable-width buffer to be individually applied to the strong-inversion region, the moderate-inversion region, and the weak-inversion region; selecting one from the width and temperature comparative lists that corresponds to one of the inversion regions in which the clock tree stays, enabling the temperature sensor to sense a temperature, and searching the selected width and temperature comparative list for a width that corresponds to the temperature sensed by the temperature sensor; and enabling the tunable-width buffer to perform a width modulation process according to the searched width.zh_TW
dc.identifier.govdocG06F001/04zh_TW
dc.identifier.govdocH03K003/00zh_TW
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/104461
dc.language.isozh_TWen_US
dc.titleMethod for buffering clock skew by using a logical effortzh_TW
dc.typePatentsen_US

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