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An all-digital phase-frequency tunable clock generator for wireless OFDM communications systems

dc.citation.epage308en_US
dc.citation.spage305en_US
dc.contributor.authorYu, Jui-Yuanen_US
dc.contributor.authorChen, Juinn-Tingen_US
dc.contributor.authorYang, Mei-Huien_US
dc.contributor.authorChung, Ching-Cheen_US
dc.contributor.authorLee, Chen-Yien_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:10:14Z
dc.date.available2014-12-08T15:10:14Z
dc.date.issued2007en_US
dc.description.abstractAn all-digital clock generator is designed to enable the clock phase and frequency tuning dynamically during the wireless communications system is in operation. This phase-frequency tunable clock generator (PFTCG) provides 8 clock phases for selection and enables the ADC circuits sampling signals with lower frequency and better sampling phase, resulting in lower power consumption. The PFTCG provides the frequency tuning range +/- 150ppm centered at 5MHz, resulting in high performance due to smaller sampling clock offset. This PFTCG is simulated under the wireless body area network system, and shows a 6.3dB SNR improvement at BER=1 e(-3), and the. hardware is simulated with power 77.56 mu M in the standard process 90nm CMOS technology.en_US
dc.identifier.isbn978-1-4244-1592-2en_US
dc.identifier.journal20TH ANNIVERSARY IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGSen_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/7813
dc.identifier.wosnumberWOS:000257572200068
dc.language.isoen_USen_US
dc.titleAn all-digital phase-frequency tunable clock generator for wireless OFDM communications systemsen_US
dc.typeArticleen_US

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