Edge hole direct tunneling in off-state ultrathin gate oxide p-channel MOSFETs

Abstract

This paper examines the edge direct tunneling (EDT) of hole from p(+) polysilicon to underlying p-type drain extension in off-state p-channel MOSFETs having ultrathin gate oxide thicknesses (1.2 - 2.2 nm). It is found that for thinner oxide thicknesses, hole EDT is more pronounced over the conventional GIDL and gate-to-channel tunneling, and as a result, the induced gate and drain leakage is better measured per unit gate width. A physical model accounting for heavy and light hole's subbands in the quantized accumulation polysilicon surface is built explicitly. This model consistently reproduces EDT I-V and the tunneling path size extracted falls adequately within the gate-to-drain overlap region. The ultimate oxide thickness limit due to EDT is projected as well.