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An 8 mu W 100kS/s Successive Approximation ADC for Biomedical Applications

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10.1109/LISSA.2009.4906739

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A successive approximation analog-to-digital converter (SA-ADC) for biomedical application is presented. It is based on 0.18-mu m standard CMOS technology and operates at low supply voltage at 1V. Boosted switch for sample-and-hold stage, split capacitor array for DAC, and clocked rail-to-rail comparator are used to achieve low-power consumption. The ADC has signal-to-noise-and-distortion ratio of 53dB for supply voltage of 1V, at sampling rate of 100kS/s and power consumption of 8 mu W.

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