前瞻性混合信號式電路設計技術開發---總計畫暨子計畫五：前瞻性靜電放電防護技術開發
| dc.contributor.author | 柯明道 | zh_TW |
| dc.contributor.author | KER MING-DOU | en_US |
| dc.contributor.department | 國立交通大學電子工程學系及電子研究所 | zh_TW |
| dc.date.accessioned | 2016-03-28T08:17:51Z | |
| dc.date.available | 2016-03-28T08:17:51Z | |
| dc.date.issued | 2015 | en_US |
| dc.description.sponsorship | 科技部 | zh_TW |
| dc.identifier.govdoc | MOST103-2221-E009-197-MY2 | zh_TW |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=11272744&docId=455640 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/130494 | |
| dc.language.iso | zh_TW | en_US |
| dc.title | 前瞻性混合信號式電路設計技術開發---總計畫暨子計畫五：前瞻性靜電放電防護技術開發 | zh_TW |
| dc.title | Development of Advanced On-Chip ESD Protection Circuits | en_US |
| dc.type | Plan | en_US |
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