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Method for analog placement and global routing considering wiring symmetry

dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber08307323zh_TW
dc.contributor.authorJiang Iris Hui-Ruen_US
dc.contributor.authorYang Yu-Mingen_US
dc.date.accessioned2014-12-16T06:14:09Z
dc.date.available2014-12-16T06:14:09Z
dc.date.issued2012-11-06en_US
dc.description.abstractA method for analog placement and global routing considering wiring symmetry performs a layout for a circuit which is described by a netlist having a set of devices and wires. First, the method inputs the netlist, and each device thereof has a design constraint and a corresponding priority. Based on the priorities, it performs a sorting on the devices to establish a constraint library. Then, based on the design constraint and corresponding priority of each device, the method establishes a hierarchical constraint tree. According to the hierarchical constraint tree, the method performs placement of each device, wherein possible shape of each device is represented by a shape curve. For each placement of the device, the method calculates a corresponding cost function. Then, it selects an optimum placement of the device according to the cost functions. The method establishes an RSMT for each wire and then performs an analog routing.zh_TW
dc.identifier.govdocG06F009/455zh_TW
dc.identifier.govdocG06F017/50zh_TW
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/104532
dc.language.isozh_TWen_US
dc.titleMethod for analog placement and global routing considering wiring symmetryzh_TW
dc.typePatentsen_US

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