Characterization and modeling of on-chip inductor substrate coupling effect
| dc.citation.epage | 160 | en_US |
| dc.citation.spage | 157 | en_US |
| dc.contributor.author | Chao, CJ | en_US |
| dc.contributor.author | Wong, SC | en_US |
| dc.contributor.author | Hsu, CJ | en_US |
| dc.contributor.author | Chen, MJ | en_US |
| dc.contributor.author | Leu, LY | en_US |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2014-12-08T15:26:30Z | |
| dc.date.available | 2014-12-08T15:26:30Z | |
| dc.date.issued | 2002 | en_US |
| dc.description.abstract | The substrate coupling effects of two adjacent coplanar spiral inductors are characterized and modeled. The noise magnitude between two 45mum-away inductors can be reduced by 6.83 dB by using guard-ring surrounding each inductor, and improved by 10.28 dB further by adding patterned ground polysilicon shield beneath at 3 GHz. The inductor with patterned polysilicon shield beneath shows improved quality factor and noise isolation. Moreover, a macro model is presented for modeling quality factor and inductance of on-chip spiral inductor and associated neighboring inductor's coupling noise effect. | en_US |
| dc.identifier.doi | 10.1109/MWSYM.2002.1011583 | en_US |
| dc.identifier.isbn | 0-7803-7239-5 | en_US |
| dc.identifier.issn | 0149-645X | en_US |
| dc.identifier.journal | 2002 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM DIGEST, VOLS 1-3 | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/MWSYM.2002.1011583 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/18825 | |
| dc.identifier.wosnumber | WOS:000178310900035 | |
| dc.language.iso | en_US | en_US |
| dc.title | Characterization and modeling of on-chip inductor substrate coupling effect | en_US |
| dc.type | Proceedings Paper | en_US |