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針對3D整合之電子設計自動化技術開發---子計畫五:應用在驗證與測試3D IC整合過程中以計算智慧為基礎的測試向量產生方法(II)

dc.contributor.author溫宏斌en_US
dc.contributor.authorWen Charles H.-P.en_US
dc.contributor.department國立交通大學電信工程學系(所)zh_TW
dc.date.accessioned2014-12-13T10:46:08Z
dc.date.available2014-12-13T10:46:08Z
dc.date.issued2010en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.identifier.govdocNSC99-2220-E009-039zh_TW
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=2158378&docId=347336en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/100664
dc.language.isozh_TWen_US
dc.subject矽穿孔zh_TW
dc.subject掃描測試zh_TW
dc.subject核心對應法zh_TW
dc.subject任務排程zh_TW
dc.subject動態壓頻調整zh_TW
dc.subjectTSVen_US
dc.subjectscan testingen_US
dc.subjectcore mappingen_US
dc.subjecttask schedulingen_US
dc.subjectDVFSen_US
dc.title針對3D整合之電子設計自動化技術開發---子計畫五:應用在驗證與測試3D IC整合過程中以計算智慧為基礎的測試向量產生方法(II)zh_TW
dc.titleComputational-Intelligence-Based Test Pattern Generation for Verification and Test of 3D IC Integrationen_US
dc.typePlanen_US

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