Circuit performance degradation of sample-and-hold amplifier due to gate-oxide overstress in a 130-nm CMOS process
| dc.citation.epage | 706 | en_US |
| dc.citation.spage | 705 | en_US |
| dc.contributor.author | Chen, Jung-Sheng | en_US |
| dc.contributor.author | Ker, Ming-Dou | en_US |
| dc.contributor.department | 電機學院 | zh_TW |
| dc.contributor.department | College of Electrical and Computer Engineering | en_US |
| dc.date.accessioned | 2014-12-08T15:25:06Z | |
| dc.date.available | 2014-12-08T15:25:06Z | |
| dc.date.issued | 2006 | en_US |
| dc.description.abstract | The effect of gate-oxide reliability on MOS switch in the bootstrapped circuit is investigated with the sample-and-hold amplifier in a 130-nm CMOS process. After overstress on the MOS switch of sample-and-hold amplifier, the circuit performances in the frequency domain are measured to verify the impact of gate-oxide reliability on circuit performance. | en_US |
| dc.identifier.doi | 10.1109/RELPHY.2006.251334 | en_US |
| dc.identifier.isbn | 0-7803-9498-4 | en_US |
| dc.identifier.journal | 2006 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 44TH ANNUAL | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/RELPHY.2006.251334 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/17479 | |
| dc.identifier.wosnumber | WOS:000240855800149 | |
| dc.language.iso | en_US | en_US |
| dc.title | Circuit performance degradation of sample-and-hold amplifier due to gate-oxide overstress in a 130-nm CMOS process | en_US |
| dc.type | Proceedings Paper | en_US |