Low-capacitance SCR with waffle layout structure for on-chip ESD protection in RF ICs
| dc.citation.epage | 752 | en_US |
| dc.citation.spage | 749 | en_US |
| dc.contributor.author | Lin, Chun-Yu | en_US |
| dc.contributor.author | Ker, Ming-Dou | en_US |
| dc.contributor.department | 電機學院 | zh_TW |
| dc.contributor.department | College of Electrical and Computer Engineering | en_US |
| dc.date.accessioned | 2014-12-08T15:09:54Z | |
| dc.date.available | 2014-12-08T15:09:54Z | |
| dc.date.issued | 2007 | en_US |
| dc.description.abstract | Silicon-controlled rectifier (SCR) has been used as an effective on-chip ESD protection device in CMOS technology due to the highest ESD robustness. In this work, the waffle layout structure for SCR can achieve smaller parasitic capacitance under the same ESD robustness. With smaller parasitic capacitance, the degradation on RF circuit performance due to ESD protection device can be reduced. The proposed waffle SCR with low parasitic capacitance is suitable for on-chip ESD protection in RFICs. | en_US |
| dc.identifier.doi | 10.1109/RFIC.2007.380991 | en_US |
| dc.identifier.isbn | 978-1-4244-0530-5 | en_US |
| dc.identifier.issn | 1529-2517 | en_US |
| dc.identifier.journal | 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, Digest of Papers | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1109/RFIC.2007.380991 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/7568 | |
| dc.identifier.wosnumber | WOS:000248148800171 | |
| dc.language.iso | en_US | en_US |
| dc.subject | electrostatic discharges (ESD) | en_US |
| dc.subject | radio-frequency integrated circuit (RF IC) | en_US |
| dc.subject | silicon-controlled rectifier (SCR) | en_US |
| dc.title | Low-capacitance SCR with waffle layout structure for on-chip ESD protection in RF ICs | en_US |
| dc.type | Proceedings Paper | en_US |