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Impacts of NBTI on SRAM Array with Power Gating Structure

dc.citation.epage77en_US
dc.citation.spage76en_US
dc.contributor.authorYang, Hao-Ien_US
dc.contributor.authorChuang, Ching-Teen_US
dc.contributor.authorHwang, Weien_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:20:11Z
dc.date.available2014-12-08T15:20:11Z
dc.date.issued2009en_US
dc.identifier.isbn978-1-4244-2784-0en_US
dc.identifier.journalPROCEEDINGS OF TECHNICAL PROGRAM: 2009 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONSen_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/14322
dc.identifier.wosnumberWOS:000272451000033
dc.language.isoen_USen_US
dc.titleImpacts of NBTI on SRAM Array with Power Gating Structureen_US
dc.typeProceedings Paperen_US

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