Analysis of thermal activation energy for poly-Si TFTs
| dc.citation.epage | 536 | en_US |
| dc.citation.spage | 533 | en_US |
| dc.contributor.author | Chiu, Chao-Chian | en_US |
| dc.contributor.author | Zan, Hsiao-Wen | en_US |
| dc.contributor.author | Shaw, Er-Kang | en_US |
| dc.contributor.department | 光電工程學系 | zh_TW |
| dc.contributor.department | Department of Photonics | en_US |
| dc.date.accessioned | 2014-12-08T15:25:30Z | |
| dc.date.available | 2014-12-08T15:25:30Z | |
| dc.date.issued | 2005 | en_US |
| dc.description.abstract | The conduction behavior of Poly-Si TFTs had been carefully studied by analyzing their activation energy under different bias condition. It is found that the trapping effects dominate grain boundary barrier under small drain bias, while the DIGBL effect was pronounced under high drain bias. Considering both the trapping effects and the DIGBL effects, a new activation energy model has been proposed and verified. The cut-off region activation energy of devices with or without LDD structure was also compared in this paper. The influence of gate bias on leakage current was examined by device simulation results. | en_US |
| dc.identifier.isbn | 978-957-28522-2-4 | en_US |
| dc.identifier.journal | IDMC 05: PROCEEDINGS OF THE INTERNATIONAL DISPLAY MANUFACTURING CONFERENCE 2005 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/17909 | |
| dc.identifier.wosnumber | WOS:000259399200147 | |
| dc.language.iso | en_US | en_US |
| dc.title | Analysis of thermal activation energy for poly-Si TFTs | en_US |
| dc.type | Proceedings Paper | en_US |
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