Cyclic redundancy check modification for message length detection and error detection

dc.citation.patentcountryUSAzh_TW
dc.citation.patentnumber20050257118zh_TW
dc.contributor.authorShien, Shin-Linen_US
dc.date.accessioned2014-12-16T06:16:15Z
dc.date.available2014-12-16T06:16:15Z
dc.date.issued2005-11-17en_US
dc.description.abstractIn a method for a variable-length communications system including encoding a message and decoding a data bit stream, the message includes a plurality of message blocks. A message block of the message is encoded by generating a parity check bit stream, flipping the parity check bit stream, and appending the flipped parity check bit stream to the end of the message block. When a data bit stream is received, a guessed message block and a guessed flipped parity check bit stream are extracted based on a guessed message block length. A parity check bit stream is generated for the guessed message block and then flipped. If the flipped parity check bit stream is the same as the guessed flipped parity check bit stream, the message block has been identified. Otherwise, the guessed message block length is increased by 1 and the above step is repeated.zh_TW
dc.identifier.govdocH03M013/00zh_TW
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/105721
dc.language.isozh_TWen_US
dc.titleCyclic redundancy check modification for message length detection and error detectionzh_TW
dc.typePatentsen_US

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