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以系統晶片技術實現數位電視廣播接收器並建立其設計平台---子計畫四:數位電視廣播接收器之數位解調與同步設計及其平台與晶片製作(III)

dc.contributor.author周世傑en_US
dc.contributor.authorJOU SHYH-JYEen_US
dc.contributor.department交通大學電子工程系zh_TW
dc.date.accessioned2014-12-13T10:29:18Z
dc.date.available2014-12-13T10:29:18Z
dc.date.issued2006en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.identifier.govdocNSC95-2220-E009-008zh_TW
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=1279571&docId=234477en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/89095
dc.language.isozh_TWen_US
dc.title以系統晶片技術實現數位電視廣播接收器並建立其設計平台---子計畫四:數位電視廣播接收器之數位解調與同步設計及其平台與晶片製作(III)zh_TW
dc.titleDigital Demodulation and Synchronization Platform Design and Chip(III)en_US
dc.typePlanen_US

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