An ESD-Protected 5-GHz Differential Low-Noise Amplifier in a 130-nm CMOS Process

Abstract

A novel ESD protection design for radio-frequency (RF) differential input/output (I/O) pads is proposed and successfully applied to a 5-GHz differential low-noise amplifier (LNA) in a 130-nm CMOS process. In the proposed ESD protection design, an ESD bus and a local ESD clamp device are added between the differential input pads to quickly bypass ESD current, especially under the pin-to-pin ESD-stress condition. With 10.3-mW power consumption under 1.2-V power supply, the differential LNA with the proposed ESD protection design has the human-body-model (HBM) ESD robustness of 3 kV, and exhibits 18-dB power gain and 2.62-dB noise figure at 5 GHz. Experimental results have demonstrated that the proposed ESD protection circuit can be co-designed with the input matching network of LNA to simultaneously achieve excellent RF performance and high ESD robustness.