Low voltage high speed SiO(2)/AlGaN/AlLaO(3)/TaN memory with good retention

dc.citation.epage	168	en_US
dc.citation.spage	165	en_US
dc.contributor.author	Chin, A	en_US
dc.contributor.author	Laio, CC	en_US
dc.contributor.author	Chen, C	en_US
dc.contributor.author	Chiang, KC	en_US
dc.contributor.author	Yu, DS	en_US
dc.contributor.author	Yoo, WJ	en_US
dc.contributor.author	Samudra, GS	en_US
dc.contributor.author	Wang, T	en_US
dc.contributor.author	Hsieh, IJ	en_US
dc.contributor.author	McAlister, SP	en_US
dc.contributor.author	Chi, CC	en_US
dc.contributor.department	電機學院	zh_TW
dc.contributor.department	College of Electrical and Computer Engineering	en_US
dc.date.accessioned	2014-12-08T15:25:11Z
dc.date.available	2014-12-08T15:25:11Z
dc.date.issued	2005	en_US
dc.description.abstract	To improve trapping using deeper well AlGaN (chi=3.8eV), lower voltage drop in high-K AlLaO(3) barrier (kappa=23), and smaller erase current by large Delta E(c) of AILaO(3)/TaN, the SiO(2)/AlGaN/AlLaO(3)/TaN devices show good 85 degrees C memory integrity of low +/- 10V 1ms P/E, large 3.9V initial Delta V(th) and 2.4V extrapolated 10-year retention. A fast 100ps P/E of +/- 11V still gives 3.0V initial Delta V(th) and 1.6V 10-year retention.	en_US
dc.identifier.isbn	0-7803-9268-X	en_US
dc.identifier.journal	IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2005, TECHNICAL DIGEST	en_US
dc.identifier.uri	https://ir.lib.nycu.edu.tw/handle/11536/17578
dc.identifier.wosnumber	WOS:000236225100036
dc.language.iso	en_US	en_US
dc.title	Low voltage high speed SiO(2)/AlGaN/AlLaO(3)/TaN memory with good retention	en_US
dc.type	Proceedings Paper	en_US

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