用於快閃式記憶元件及電路性能與可靠性模擬的元件模式
| dc.contributor.author | 莊紹勳 | en_US |
| dc.contributor.author | Chung Steve S | en_US |
| dc.contributor.department | 交通大學電子工程系 | zh_TW |
| dc.date.accessioned | 2014-12-13T10:49:24Z | |
| dc.date.available | 2014-12-13T10:49:24Z | |
| dc.date.issued | 2000 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.identifier.govdoc | NSC89-2215-E009-046 | zh_TW |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=542121&docId=99587 | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/101626 | |
| dc.language.iso | zh_TW | en_US |
| dc.subject | 快閃式記憶體 | zh_TW |
| dc.subject | 閘極電流模型 | zh_TW |
| dc.subject | 汲極電流模型 | zh_TW |
| dc.subject | SPICE模型 | zh_TW |
| dc.subject | 電路模擬器 | zh_TW |
| dc.subject | Flash memory | en_US |
| dc.subject | Gate current model | en_US |
| dc.subject | Drain current model | en_US |
| dc.subject | SPICE model | en_US |
| dc.subject | Circuit simulator | en_US |
| dc.title | 用於快閃式記憶元件及電路性能與可靠性模擬的元件模式 | zh_TW |
| dc.title | A Compact Spice Model for Performance and Reliability Simulation of Flash EEPROM Cells and Circuits | en_US |
| dc.type | Plan | en_US |