TMD FinFET with 4 nm Thin Body and Back Gate Control for Future Low Power Technology
| dc.citation.woscount | 0 | en_US |
| dc.contributor.author | Chen, Min-Cheng | en_US |
| dc.contributor.author | Li, Kai-Shin | en_US |
| dc.contributor.author | Li, Lain-Jong | en_US |
| dc.contributor.author | Lu, Ang-Yu | en_US |
| dc.contributor.author | Li, Ming-Yang | en_US |
| dc.contributor.author | Chang, Yung-Huang | en_US |
| dc.contributor.author | Lin, Chang-Hsien | en_US |
| dc.contributor.author | Chen, Yi-Ju | en_US |
| dc.contributor.author | Hou, Yun-Fang | en_US |
| dc.contributor.author | Chen, Chun-Chi | en_US |
| dc.contributor.author | Wu, Bo-Wei | en_US |
| dc.contributor.author | Wu, Cheng-San | en_US |
| dc.contributor.author | Yang, Ivy | en_US |
| dc.contributor.author | Lee, Yao-Jen | en_US |
| dc.contributor.author | Shieh, Jia-Min | en_US |
| dc.contributor.author | Yeh, Wen-Kuan | en_US |
| dc.contributor.author | Shih, Jyun-Hong | en_US |
| dc.contributor.author | Su, Po-Cheng | en_US |
| dc.contributor.author | Sachid, Angada B. | en_US |
| dc.contributor.author | Wang, Tahui | en_US |
| dc.contributor.author | Yang, Fu-Liang | en_US |
| dc.contributor.author | Hu, Chenming | en_US |
| dc.contributor.department | 電子物理學系 | zh_TW |
| dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
| dc.contributor.department | Department of Electrophysics | en_US |
| dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
| dc.date.accessioned | 2017-04-21T06:48:18Z | |
| dc.date.available | 2017-04-21T06:48:18Z | |
| dc.date.issued | 2015 | en_US |
| dc.description.abstract | A 4 nm thin transition-metal dichalcogenide (TMD) body FinFET with back gate control is proposed and demonstrated for the first time. The TMD FinFET channel is deposited by CVD. Hydrogen plasma treatment of TMD is employed to lower the series resistance for the first time. The 2 nm thin back gate oxide enables 0.5 V of Vth shift with 1.2 V change in back bias for correcting device variations and dynamically configuring a device as a high performance or low leakage device. TMD can potentially provide sub-nm thin monolayer body needed for 2 nm node FinFET. | en_US |
| dc.identifier.isbn | 978-1-4673-9894-7 | en_US |
| dc.identifier.journal | 2015 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) | en_US |
| dc.identifier.uri | https://ir.lib.nycu.edu.tw/handle/11536/136034 | |
| dc.identifier.wosnumber | WOS:000380472500207 | en_US |
| dc.language.iso | en_US | en_US |
| dc.title | TMD FinFET with 4 nm Thin Body and Back Gate Control for Future Low Power Technology | en_US |
| dc.type | Proceedings Paper | en_US |
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