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Reducing the overkills and retests in wafer testing process

dc.citation.epage291en_US
dc.citation.spage286en_US
dc.contributor.authorHorng, SCen_US
dc.contributor.authorLin, SYen_US
dc.contributor.authorCheng, MHen_US
dc.contributor.authorYang, FYen_US
dc.contributor.authorLiu, CHen_US
dc.contributor.authorLee, WYen_US
dc.contributor.authorTsai, CHen_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.date.accessioned2014-12-08T15:26:01Z
dc.date.available2014-12-08T15:26:01Z
dc.date.issued2003en_US
dc.description.abstractReducing overkills is one of the main objectives in wafer testing process, however the major mean to prevent overkills is retest. In this paper, we formulate the problem of reducing overkills and retests as a stochastic optimization problem to determine optimal threshold values concerning the number of good dies and the number of bins in a lot and wafer to decide whether to go for a retest after a regular wafer probing. The considered stochastic optimization problem is an NP hard problem. We propose an Ordinal Optimization theory based two-level method to solve the problem for good enough threshold values to achieve lesser overkills and retests within a reasonable computational time. Applying to a case based on the true mean of bins of a real semiconductor product, the threshold values we obtained are the best among 1000 sets of randomly generated threshold values in the sense of lesser overkills under a tolerable retest rate.en_US
dc.identifier.doi10.1109/ASMC.2003.1194508en_US
dc.identifier.isbn0-7803-7673-0en_US
dc.identifier.issn1078-8743en_US
dc.identifier.journalASCMC 2003: IEEE/SEMI (R) ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE AND WORKSHOP, PROCEEDINGSen_US
dc.identifier.urihttp://dx.doi.org/10.1109/ASMC.2003.1194508en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/18433
dc.identifier.wosnumberWOS:000182993100049
dc.language.isoen_USen_US
dc.subjectwafer testingen_US
dc.subjectoverkillen_US
dc.subjectretesten_US
dc.subjectstochastic optimizationen_US
dc.subjectordinal optimizationen_US
dc.titleReducing the overkills and retests in wafer testing processen_US
dc.typeProceedings Paperen_US

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