UNIFICATION OF OBSTACLE-AVOIDING RECTILINEAR STEINER TREE CONSTRUCTION

dc.citation.epage	130	en_US
dc.citation.spage	127	en_US
dc.contributor.author	Jiang, Iris Hui-Ru	en_US
dc.contributor.author	Lin, Shung-Wei	en_US
dc.contributor.author	Yu, Yen-Ting	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.date.accessioned	2014-12-08T15:45:55Z
dc.date.available	2014-12-08T15:45:55Z
dc.date.issued	2008	en_US
dc.description.abstract	Multi-layer obstacle-avoiding rectilinear Steiner tree construction is an essential problem in physical design for advanced SoC and nano technologies. This paper unifies obstacle-avoiding rectilinear Steiner tree construction either for single or for multiple routing layers. Experimental results show that our algorithm outperforms the state-of-the-art works for both cases.	en_US
dc.identifier.isbn	978-1-4244-2596-9	en_US
dc.identifier.journal	IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS	en_US
dc.identifier.uri	https://ir.lib.nycu.edu.tw/handle/11536/30876
dc.identifier.wosnumber	WOS:000260931700026
dc.language.iso	en_US	en_US
dc.title	UNIFICATION OF OBSTACLE-AVOIDING RECTILINEAR STEINER TREE CONSTRUCTION	en_US
dc.type	Article	en_US

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