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利用用戶可程式化閘陣列之資料流合成

dc.contributor.author項春申 zh_TW
dc.contributor.department交通大學電子研究所 zh_TW
dc.date.accessioned2016-12-20T03:57:07Z
dc.date.available2016-12-20T03:57:07Z
dc.date.issued1993en_US
dc.description.abstract zh_TW
dc.description.abstract en_US
dc.description.sponsorship行政院國家科學委員會 zh_TW
dc.identifier.govdocNSC82-0404-E009-401 zh_TW
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=46066&docId=6611en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/132170
dc.language.isozh_TWen_US
dc.subject zh_TW
dc.subject en_US
dc.title利用用戶可程式化閘陣列之資料流合成zh_TW
dc.titleDatapath Synthesis Using FPGAen_US
dc.typePlanen_US

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