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A novel leakage current separation technique in a direct Tunneling regime gate oxide SONOS memory cell

dc.citation.epage620en_US
dc.citation.spage617en_US
dc.contributor.authorChung, SSen_US
dc.contributor.authorChiang, PYen_US
dc.contributor.authorChou, Gen_US
dc.contributor.authorHuang, CTen_US
dc.contributor.authorChen, Pen_US
dc.contributor.authorChu, CHen_US
dc.contributor.authorHsu, CCHen_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.date.accessioned2014-12-08T15:26:18Z
dc.date.available2014-12-08T15:26:18Z
dc.date.issued2003en_US
dc.description.abstractIn this paper, data retention for various top and bottom oxide (tunnel oxide) SONOS cells has been extensively investigated. For the first time, a leakage current separation technique has been developed to distinguish the two leakage current components via thermionic and direct tunneling (DT) in the ONO layer. Results show that the short-term leakage is dominated by the direct tunneling, while the long-term leakage is dominated by the thermionic emission. The direct tunneling through either tunnel or blocking oxide can also be identified experimentally. These results are useful toward an understanding of the scaling of SONOS cell with focus on its reliabilities.en_US
dc.identifier.isbn0-7803-7872-5en_US
dc.identifier.journal2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGESTen_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/18689
dc.identifier.wosnumberWOS:000189158800141
dc.language.isoen_USen_US
dc.titleA novel leakage current separation technique in a direct Tunneling regime gate oxide SONOS memory cellen_US
dc.typeProceedings Paperen_US

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