Design of a 125 mu W, fully-scalable MPEG-2 and H.264/AVC video decoder for mobile applications

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dc.citation.epage289en_US
dc.citation.spage288en_US
dc.contributor.authorLiu, Tsu-Mingen_US
dc.contributor.authorChung, Ching-Cheen_US
dc.contributor.authorLee, Chen-Yien_US
dc.contributor.authorLin, Ting-Anen_US
dc.contributor.authorWang, Sheng-Zenen_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.date.accessioned2014-12-08T15:24:57Z
dc.date.available2014-12-08T15:24:57Z
dc.date.issued2006en_US
dc.description.abstractA design of MPEG-2 and H.264/AVC video decoder is demonstrated in a 0.18 mu m CMOS [1]. The key design issues involved in this advanced IC are discussed, including improving area and power efficiency. Power dissipation is greatly lowered through the architectural exploration. Measurement results show that MPEG-2 and H.264/AVC real-time decoding of QCIF@15fps are achieved at 1.15MHz with power dissipation of 108 mu W and 125 mu W respectively at 1V supply voltage.en_US
dc.identifier.isbn1-59593-381-6en_US
dc.identifier.issn0738-100Xen_US
dc.identifier.journal43rd Design Automation Conference, Proceedings 2006en_US
dc.identifier.urihttps://ir.lib.nycu.edu.tw/handle/11536/17331
dc.identifier.wosnumberWOS:000240104100057
dc.language.isoen_USen_US
dc.subjectdesignen_US
dc.subjectmeasurementen_US
dc.subjectperformanceen_US
dc.subjectMPEG-2en_US
dc.subjectH.264/AVCen_US
dc.subjectmobileen_US
dc.subjectlow-poweren_US
dc.titleDesign of a 125 mu W, fully-scalable MPEG-2 and H.264/AVC video decoder for mobile applicationsen_US
dc.typeProceedings Paperen_US

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